ARTERY AT32F421C8T7 - Battery Powered Domain Reset; CRM Registers; Figure 4-2 System Reset Circuit; Table 4-1 CRM Register Map and Reset Values

AT32F421 Series Reference Manual
2022.11.11 Page 48 Rev 2.02
Figure 4-2 System reset circuit
NRST
Filter
System
reset
Pulse
generator
(Min 20 µs)
WDT reset
WWDT reset
CPU software reset
Low-power management reset
IO
CTRL
POR reset
LVR reset
standby return reset
NRST reset
4.2.2 Battery powered domain reset
Battery powered domain has two specific reset sources:
 Software reset: triggered by setting the BPDRST bit in the battery powered domain control
register (CRM_BPDC)
 VDD power on, if VDD has been powered off.
Software reset affects only the battery powered domain.
4.3 CRM registers
These peripheral registers have to be accessed by bytes (8 bits), half words (16 bits) or words (32 bits).
Table 4-1 CRM register map and reset values
Register
Offset
Reset value
CRM_CTRL
0x000
0x0000 XX83
CRM_CFG
0x004
0x0000 0000
CRM_CLKINT
0x008
0x0000 0000
CRM_APB2RST
0x00C
0x0000 0000
CRM_APB1RST
0x010
0x0000 0000
CRM_AHBEN
0x014
0x0000 0014
CRM_APB2EN
0x018
0x0000 0000
CRM_APB1EN
0x01C
0x0000 0000
CRM_BPDC
0x020
0x0000 0000
CRM_CTRLSTS
0x024
0x0C00 0000
CRM_AHBRST
0x028
0x0000 0000
CRM_PLL
0x2C
0x0000 1F10
CRM_MISC1
0x030
0x0010 0000
CRM_MISC2
0x054
0x0000 000D