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ARTERY AT32F421C8T7 - CRC Verify; Flash Memory Registers; Table 5-6 Flash Memory Interface-Register Map and Reset Value

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AT32F421 Series Reference Manual
2022.11.11 Page 72 Rev 2.02
5.7.3 CRC verify
The sLib code or user code go through optional CRC check on the basis of a sector level.
CRC verify procedure as follows:
Check that no Flash memory operation is ongoing by checking the OBF bit in the FLASH_STS
register
Program the start address of the code to be verified in the FLASH_CRC_ADDR register
Program the code count (in terms of sectors) to be verified through bit [15:0] in the
FLASH_CRC_CTR register
Enable CRC verify by setting the bit 16 of the FLASH_CRC_CTR register
Wait until the OBF bit becomes 0
Read the FLASH_CRC_CHKR register to verify
Note: The values of the FLASH_CRC_ADDR register must be aligned with the start address of the
sector; CRC verify must not cross the main Flash memory and its extension area boundary.
5.8 Flash memory registers
These peripheral registers must be accessed by words (32 bits).
Table 5-6 Flash memory interfaceRegister map and reset value
Register
Offset
Reset value
FLASH_PSR
0x00
0x0000 0030
FLASH_UNLOCK
0x04
0xXXXX XXXX
FLASH_USD_UNLOCK
0x08
0xXXXX XXXX
FLASH_STS
0x0C
0x0000 0000
FLASH_CTRL
0x10
0x0002 0080
FLASH_ADDR
0x14
0x0000 0000
FLASH_USD
0x1C
0x03FF FFFC
FLASH_EPPS
0x20
0xFFFF FFFF
SLIB_STS0
0x74
0x00FF 0000
SLIB_STS1
0x78
0xFFFF FFFF
SLIB_PWD_CLR
0x7C
0xFFFF FFFF
SLIB_MISC_STS
0x80
0x0000 0000
FLASH_CRC_ADDR
0x84
0x0000 0000
FLASH_CRC_CTRL
0x88
0x0000 0000
FLASH_CRC_CHKR
0x8C
0x0000 0000
SLIB_SET_PWD
0x160
0x0000 0000
SLIB_SET_RANGE
0x164
0x0000 0000
EM_SLIB_SET
0x168
0x0000 0000
BTM_MODE_SET
0x16C
0x0000 0000
SLIB_UNLOCK
0x170
0x0000 0000

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