AT32F421 Series Reference Manual
2022.11.11 Page 89 Rev 2.02
6.3.5 GPIO input data register (GPIOx_IDT) (x=A…H)
GPIOx input data
Indicates the input status of I/O port. Each bit
corresponds to an I/O.
6.3.6 GPIO output data register (GPIOx_ODT) (x= A…H)
GPIOx output data
Each bit represents an I/O port.
It indicates the output status of I/O port.
0: Low
1: High
6.3.7 GPIO set/clear register (GPIOx_SCR) (x=A…H)
GPIOx clear bit
The corresponding ODT register bit is cleared by writing
“1” to these bits. Otherwise, the corresponding ODT
register bit remains unchanged, which acts as ODT
register bit operations.
0: No action to the corresponding ODT bits
1: Clear the corresponding ODT bits
GPIOx set bit
The corresponding ODT register bit is set by writing “1” to
these bits. Otherwise, the corresponding ODT register bit
remains unchanged, which acts as ODT register bit
operations.
0: No action to the corresponding ODT bits
1: Set the corresponding ODT bits
6.3.8 GPIO write protection register (GPIOx_WPR) (x=A…H)
Kept at its default value.
Write protect sequence
Write protect enable sequence bit and WPEN bit must be
enabled at the same time to achieve write protection for
some I/O bits.
Write protect enable bit is executed four times in the order
below: write “1” -> write “0” -> write “1” -> read. Note that
the value of WPEN bit cannot be modified during this
period.
Write protect enable
Each bit corresponds to an I/O port.
0: No effect.
1: Write protect
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