AT32F421 Series Reference Manual
2022.11.11 Page 320 Rev 2.02
101: 55.5 cycles
110: 71.5 cycles
111: 239.5 cycles
Sample time selection of channel ADC_IN1
000: 1.5 cycles
001: 7.5 cycles
010: 13.5 cycles
011: 28.5 cycles
100: 41.5 cycles
101: 55.5 cycles
110: 71.5 cycles
111: 239.5 cycles
Sample time selection of channel ADC_IN0
000: 1.5 cycles
001: 7.5 cycles
010: 13.5 cycles
011: 28.5 cycles
100: 41.5 cycles
101: 55.5 cycles
110: 71.5 cycles
111: 239.5 cycles
18.5.6 ADC preempted channel data offset register x (ADC_
PCDTOx) (x=1..4)
Accessible by words.
Kept at its default value
Data offset for Preempted channel x
Converted data stored in the ADC_PDTx = Raw
converted data – ADC_PCDTOx
18.5.7 ADC voltage monitor high threshold register
(ADC_VWHB)
Accessible by words.
Kept at its default value
Voltage monitoring high boundary
18.5.8 ADC voltage monitor low threshold register (ADC_
VWLB)
Accessible by words.
Kept at its default value
Voltage monitoring low boundary
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