ARTERY AT32F421C8T7 - Clock and Reset Manage (CRM); Clock; Clock Sources; Figure 4-1 AT32 F421 Clock Tree

AT32F421 Series Reference Manual
2022.11.11 Page 45 Rev 2.02
4 Clock and reset manage (CRM)
4.1 Clock
AT32F421 series provide different clock sources: HEXT oscillator clock, HICK oscillator clock, PLL clock,
LEXT oscillator and LICK oscillator.
Figure 4-1 AT32F421 clock tree
/32
LEXT
ERTCCLK
To ERTC
LICK RC
40 kHz
RTCSEL[1:0]
To WDT
WDTCLK
CLKOUT
ADC
Divider
/2,4,6,8,12,16
To ADC1 ADCCLK
Max.28 MHz
Peripheral
clock enable
To AHB peripheral/memory
HICK RC
48 MHz
/6
HICK48M
HICKDIV
HEXT_OUT
HEXT_IN
HEXT OSC
4-25 MHz
HEXT
HEXT
PLLRCS
PLLCLK
LEXT OSC
32.768 kHz
LEXT_IN
LEXT_OUT
LICK
HICK_TO_SCLK
SCLKSEL
CFD
HICK8M
HEXT
HICK
SCLK
Max.
120 MHz
12S1/2 CLK
Peripheral
clock enable
AHB
Divider
/1,2...512
HCLK
Max.
120MHz
CPU FCLK
/8
CPU SysTick
CLKOUT
Divider
/1,2..512
Peripheral
Clock enable
PCLK1/2
Max.
120 MHz
To APB1/2
peripheral
Max.
120 MHz
to TMRx
CLK
Peripheral
clock enable
x1,x 2
APB1/2
Divider
/1,2,4,8,16
/2
HEXT
Divider
/2
*2,*3,*4
*16,,*64,
PLL
PLLMULT
PLLHEXTDIV
HICK4M
PCLK2
Max.120 MHz
/2
/4
PLLCLK
PLLCLK
HICK
HEXT
SCLK
ADCCLK
LICK
LEXT
CLKOUT_SEL
To FlashHICK8M
AHB, APB1 and APB2 all support multiple frequency division. The AHB domain has a maximum of 120
MHz, and both APB1 and APB2 are up to 120 MHz.
4.1.1 Clock sources
 High speed external oscillator (HEXT)
The HEXT includes two clock sources: crystal/ceramic resonator and bypass clock.
The HEXT crystal/ceramic resonator is connected externally to a 4~25 MHz HEXT crystal that produces
a highly accurate clock for the system. The HEXT clock signal is not released until it becomes stable.
An external clock source can be provided by HEXT bypass. Its frequency can be up to 25 MHz. The
external clock signal should be connected to the HEXT_IN pin while the HEXT_OUT pin should be left
floating.
 High speed internal clock (HICK)
The HICK oscillator is clocked by a high-speed RC in the microcontroller. The internal frequency of the
HICK clock is 48 MHz. Although it is less accurate, it takes less time to start than HEXT crystal, and the
HICK clock frequency of each device is calibrated to 1% accuracy (25°C) in factory. The factory
calibration value is loaded in the HICKCAL[7: 0] bit of the clock control register. The RC oscillator speed
may be affected by voltage or temperature variations. Thus the HICK frequency can be trimmed using
the HICKTRIM[5: 0] bit in the clock control register.
The HICK clock signal is not released until it becomes stable.
 PLL clock
The HICK or HEXT clock can be used as an input clock source of the PLL. The PLL input clock, after
frequency division through pre-scalar inside the PLL, is sent to VCO for frequency multiplication. The
VCO frequency is output after being divided by post-scalar. Among them, the pre-scalar clock must be
a range of between 2 M and 16 MHz, while the VCO operating frequency must be a range of between