AT32F421 Series Reference Manual
2022.11.11 Page 2 Rev 2.02
Contents
1 System architecture ...................................................................... 25
1.1 System overview .......................................................................... 27
1.1.1 ARM Cortex
TM
-M4 processor ........................................................ 27
1.1.2 Bit band ...................................................................................... 27
1.1.3 Interrupt and exception vectors .................................................... 29
1.1.4 System Tick (SysTick) ................................................................. 31
1.1.5 Reset ......................................................................................... 31
1.2 List of abbreviations for registers .................................................. 33
1.3 Device characteristics information ................................................. 33
1.3.1 Flash memory size register .......................................................... 33
1.3.2 Device electronic signature .......................................................... 33
2 Memory resources ........................................................................ 34
2.1 Internal memory address map ....................................................... 34
2.2 Flash memory .............................................................................. 35
2.3 SRAM memory ............................................................................. 35
2.4 Peripheral address map................................................................ 36
3 Power control (PWC) ..................................................................... 39
3.1 Introduction ................................................................................. 39
3.2 Main Features ............................................................................. 39
3.3 POR/LVR .................................................................................... 40
3.4 Power voltage monitor (PVM) ........................................................ 40
3.5 Power domain .............................................................................. 41
3.6 Power saving modes .................................................................... 41
3.7 PWC registers ............................................................................. 43
3.7.1 Power control register (PWC_CTRL) ............................................ 43
3.7.2 Power control/status register (PWC_CTRLSTS) ............................ 44
3.7.3 Power control register 2 (PWC_CTRL2) ........................................ 44
4 Clock and reset manage (CRM) ..................................................... 45
4.1 Clock .......................................................................................... 45