Slave DSP 1‑Phase PWM Signal
Generation (PWM) *)
Signal Conflicting I/O Feature **)
Ch
(RTI)
Ch
(RTLib)
Ch
(RTI)
Ch
(RTLib)
Ch 4 Ch 4 SPWM9 Slave DSP Bit I/O unit Bit 6 Group 2, bit 2
*) Related RTI blocks and RTLib
functions:
n DS1103SL_DSP_PWM
n See Slave DSP PWM
Generation ( DS1103 RTLib
Reference)
**) Related RTI blocks and RTLib functions:
D2F:
n DS1103SL_DSP_D2F
n See Square Wave Signal Generation (D2F) ( DS1103 RTLib Reference)
Slave DSP Bit I/O Unit:
n DS1103SL_DSP_BIT_IN_Cx
DS1103SL_DSP_BIT_OUT_Cx
n See Slave DSP Bit I/O Unit ( DS1103 RTLib Reference)
The following I/O features of the DS1103 conflict with Slave DSP
3‑Phase PWM Signal Generation:
Conflicts for Slave DSP
3‑Phase PWM Signal
Generation (PWM3)
Slave DSP 3‑Phase PWM Signal
Generation (PWM3) *)
Signal Conflicting I/O Feature **)
Ch
(RTI)
Ch
(RTLib)
Ch
(RTI)
Ch
(RTLib)
Conflicts Concerning Slave DSP 3‑Phase PWM Signal Generation as a Whole
n If you perform space vector PWM signal generation (PWMSV) or square‑wave signal generation (D2F), you cannot
generate 3‑phase PWM signals at the same time.
*) Related RTI blocks and RTLib
functions:
n DS1103SL_DSP_PWM3
n See Slave DSP PWM3
Generation ( DS1103 RTLib
Reference)
**) Related RTI blocks and RTLib functions:
PWMSV:
n DS1103SL_DSP_PWMSV
n See Slave DSP PWMSV Generation ( DS1103 RTLib Reference)
D2F:
n DS1103SL_DSP_D2F
n See Square Wave Signal Generation (D2F) ( DS1103 RTLib Reference)
s
Mapping of I/O Signals
t
156
s
DS1103 Hardware Installation and Configuration November 2014
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