User Manual Section 5
GFK-2958L May 2021
Detailed Description of I/O Modules 165
Figure 71: Process Image is Empty at t0
A rising 0-1 edge on DI 0 causes the 1st ETS entry at address + 0.
Figure 72: 1st ETS Entry at t1
A rising 0-1 edge on DI 1 causes the 2nd ETS entry at address + 0. The 1st ETS entry is
shifted by 4 bytes.
Figure 73: 2nd ETS Entry at t2
A falling 1-0 edge on DI 0 causes the 3rd ETS entry.
Figure 74 3rd ETS Entry at t3
... 4th to14th ETS Entry .
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