Emerson PACSystems RSTi-EP - Process Alarms for EP 5112; Setting up the Counter

User Manual Section 5
GFK-2958L May 2021
Detailed Description of I/O Modules 235
Byte
Format
Name
Bit
Function when
edge 0-1
Remark
QB10
Word
Counter 1:
Control
word
QX10.0
Reserved
QX10.1
Release
comparison bit
QX10.2
Set SW gate
QX10.3 - 10.4
Reserved
QX10.5
Load set value
loads set value into
counter value
QX10.6
Reset status bits
Counter 1: status
bits 11.1 - 11.5
QB11
QX10.7 - 11.0
Reserved
QX11.1
Deactivate
comparison bit
QX11.2
Reset SW gate
QX11.3 - 11.7
Reserved
†
Internal process data mapping with data format “Standard”. Depending on the fieldbus
specification and the data format of the communicating fieldbus components the bytes and/or
words can be reversed during data transfer.
5.17.7 Process Alarms for EP 5112
Byte
Bit
Function
B0
X0.0 – 0.1
Reserved
X0.2
Counter 0: Overflow, underflow, or end value reached
X0.3
Counter 0: Comparison value reached
X0.4 – 0.5
Reserved
X0.6
Counter 1: Overflow, underflow, or end value reached
X0.7
Counter 1: Comparison value reached.
B1
X1.0
Status Counter 0: Input Channel 0 A (Track A)
X1.1
Status Counter 0: Input Channel 0 B (Track B)
X1.2
Status Counter 1: Input Channel 0 A (Track A)
X1.3
Status Counter 1: Input Channel 0 B (Track B)
X1.4 – X1.7
Reserved
B2
16 But Time Stamp 0 … 65535µs, rotating
B3
5.17.8 Setting Up the Counter
To start a counting process at least the signal mode needs to be parameterized and a rising
edge at the bit QX8.2 or QX10.2 respectively (Set SW gate) of the control word is required.
You can define the counter functions by parameterizing: the counting mode, a primary
direction (counting up/down), and the counting behavior. In addition, you can
parameterize options for setting a comparison bit (conditions, hysteresis) as well as
producing a process alarm (refer to Section, Additional Counter Features).