Hitachi SH7032 - Page 261

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TCLKA–
TCLKD
φ, φ/2, 
φ/4, φ/8
Clock selection
Comparator Control logic
Module data bus
TIOCA4
TIOCB4
IMIA4
IMIB4
OVI4
TOCXA4
TOCXB4
GCNT4
BRA4
GRA4
TCR4
TIOR4
TIER4
TSR4
BRB4
GRB4
TCNT4: Timer counter 4 (16 bits)
GRA4, GRB4: General registers A4, B4 (input capture/output compare dual use) (16 bits × 2)
BRA4, BRB4: Buffer registers A4, B4 (input capture/output compare dual use) (16 bits × 2)
TCR4: Timer control register 4 (8 bits)
TIOR4: Timer I/O control register 4 (8 bits)
TIER4: Timer interrupt enable register 4 (8 bits)
TSR4: Timer status register 4 (8 bits)
Figure 10.5 Block Diagram of Channel 4