Hitachi SH7032 - Page 464

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Bit 15:
PA15MD1
Bit 14:
PA15MD0 Function
0 0 Input/output (PA15) (Initial value)
1 Interrupt request input (IRQ3)
1 0 Reserved
1 DMA transfer request input (DREQ1)
• Bits 13 and 12 (PA14 Mode (PA14MD1 and PA14MD0)): PA14MD1 and PA14MD0 select
the function of the PA14/IRQ2/DACK1 pin.
Bit 13:
PA14MD1
Bit 12:
PA14MD0 Function
0 0 Input/output (PA14)
1 Interrupt request input (IRQ2)
1 0 Reserved
1 DMA transfer acknowledge output (DACK1) (Initial value)
• Bits 11 and 10 (PA13 Mode (PA13MD1 and PA13MD0)): PA13MD1 and PA13MD0 select
the function of the PA13/IRQ1/DREQ0/TCLKB pin.
Bit 11:
PA13MD1
Bit 10:
PA13MD0 Function
0 0 Input/output (PA13) (Initial value)
1 Interrupt request input (IRQ1)
1 0 ITU timer clock input (TCLKB)
1 DMA transfer request input (DREQ0)
• Bits 9 and 8 (PA12 Mode (PA12MD1 and PA12MD0)): PA12MD1 and PA12MD0 select the
function of the PA12/IRQ0/DACK0/TCLKA pin.
Bit 9:
PA12MD1
Bit 8:
PA12MD0 Function
0 0 Input/output (PA12)
1 Interrupt request input (IRQ0)
1 0 ITU timer clock input (TCLKA)
1 DMA transfer acknowledge output (DACK0) (Initial value)