644
Table A.77 Register Status in Reset and Power-Down States (cont)
Reset State Power-Down State
Category Abbreviation Power On Manual Standby Sleep
16-bit integrated timer pulse TSTR Initialized Initialized Initialized Held
unit (ITU)
TSNC
TMDA, TMDB
TCNT0–TCNT4
GRA0–GRA4,
GRB0–GRB4
BRA3, BRA4.
BRB3, BRB4
TCR0–TCR4
TIOR0–TIOR4
TIER0–TIER4
TSR0–TSR4
Programmable timing TPMR Initialized Initialized Held Held
pattern
controller (TPC)
TPCR
NDERA,NDERB
NDRA, NDRB
Watchdog timer (WDT) TCNT Initialized Initialized Held Held
TCSR
*
1
RSTCR
*
2
Initialized
Serial communication SMR Initialized Initialized Initialized Held
interface (SCI)
BRR
SCR
TDR
TSR Held
SSR Initialized
RDR
RSR Held
Notes: *1 Bits 7–5 (OVF, WT/IT, TME) are initialized, bits 2–0 (CKS2–CKS0) are held.
*2 Not initialized in the case of a reset by the WDT.
To Next Page
Loading...
