HP 8753E - Page 608

setup
cavity oscillator frequency
correction constant routine,
3-29
external source mode frequency
range, 2-22
fractional-N spur avoidance and
F’M sideband adjustment, 3-55
frequency accuracy adhrstment,
3-49
insertion loss measurement, 3-20
intensity check, 6-9
minimum R channel level, 2-32
mismatch device verification, 2-16
phase lock error troubleshooting,
7-4
RF output correction constants,
3-14
sampler correction routine, 3-22
source power check, 414
test port frequency range and
accuracy test, 2-19
test port input noise floor level,
2-38
test port output power accuracy,
2-25
test port output power range and
linearity, 2-28
transmis&on calibration, 2-13
setup check for disk drive, 4-7
setup check for plotter or printer,
47
short and open device verification,
9-6
shutdown circuit
post regulator, 12-7
shutdown circuit on A8, 12-7
shutdown circuitry disable, 5-16
signal examination for phase lock,
7-36
signal separation
built-in test set, 12-26
theory of operation, 12-26
signals required for Al0 assembly
operation, 8-8
SLOPE DAC, lo-19
softkeys, 10-2
source
All phase lock, 12-15
Al2 reference, 12-14
Al3 frac-N analog, 12-14
Al4 frac-N digital, 12-14
A3 source, 12-15
A7 pulse generator, 12-15
external source mode, 12-23
frequency offset, 12-22
harmonic analysis, 12-22
high band theory, 12-19
low band theory, 12-16
operation in other modes, 12-22
source, 12-15
super low band theory, 12-15
theory of operation, 12-2, 12-14
tuned receiver mode, 12-25
source and All phase lock check,
7-8
source attenuator
theory of operation, 12-2
source check, 413
Source Cor., 10-13
Source Def., 10-13
source default correction constants
adjustment, 3-7
Source Ex., l@ll
source (external), l-3
source group assemblies, 7-l
source group troubleshooting
appendix, 7-38
source match (ESP and ESR), 11-12
source mode frequency range, 2-21
SOURCE PLL ON OFT, lo-19
source power, 7-3
Index-20