XA User Guide 3-3 3/24/97
PSW.RSn are writable when the XA is operating in system or user mode, and programs running
in either mode may explicitly change these bits to make selected banks visible one at a time.
More commonly, the interrupt mechanism, as described in Chapter 4, provides automatic
implicit register bank switching so interrupt handlers may immediately begin operating in a
reserved register context.
Figure 3.2 XA Register File
SP(R7)
R6
R5
R4
R3
R2
R1
R0
R7H
R6H
R5H
R4H
R3L
R2L
R1L
R0L
R7L
R6L
R5L
R3H
R2H
R1H
R0H
R4L
Global registers.
SSP
Banked Registers
USP
R11
R10
R9
R8
Global registers
R15
R14
R13
R12
(word only)
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