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Intel 8253 - Page 367

Intel 8253
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XA User Guide 3-13 3/24/97
assigned addresses in the range 400h through 43Fh are both byte and bit-addressable. The second
half (600h through 7FFh) of the SFR space is reserved for providing access to off-chip SFRs.
The off-chip sfr space is provided to allow faster access of off-chip memory mapped I/O devices
without having to create a pointer for each access.
Following are some key points to remember when using SFRs:
SFRs should be symbolically addressed. Because SFR assignments may vary from derivative to
derivative, it is important to always use symbolic references to SFRs. XA software development
tools provide symbolic constants for all SFRs in the form of header/include files and the tools
will be updated as new SFRs are added with each added XA derivative.
Verify that your application uses the right header/include files. Although baseline SFRs are
likely to retain their addresses in future XA derivatives, this is not guaranteed. SFRs used for
optional peripherals may well have different addresses on different derivatives, and the same
address on one derivative may access a different peripheral SFR.
Any SFR may be accessed at any time without reference to a pointer or segment. SFR access is
independent of any segment register, so SFRs are always accessible with the 10 bit address
encoded in instructions accessing SFRs.
SFRs may not be accessed via indirect address. Any time indirection is used, data memory is
accessed. If an SFR address is referenced as an indirect address, physical RAM at that address –
if it exists– is accessed.
Figure 3.14 SFR address space
Reserved for off-chip,
non-bit addressable
SFRs
(memory-mapped I/O)
Standard
non-bit addressable
on-chip SFRs
64 bytes of bit
addressable on-chip
SFRs
7FFh
600h
5FFh
440h
43Fh
400h
512 bytes
512 bytes
1K directly
addressable
SFR space

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