Intel 8253 - Page 441

4/17/98 6-41 Addressing Modes and Data Types
ADDC Rd, direct
Bytes: 3
Clocks: 4
Operation: (Rd) <-- (Rd) + (direct) + (C)
Encoding:
byte 3: lower 8 bits of direct
ADDC Rd, #data8
Bytes: 3
Clocks: 3
Operation: (Rd) <-- (Rd) + #data8 + (C)
Encoding:
byte 3: #data8
ADDC Rd, #data16
Bytes: 4
Clocks: 3
Operation: (Rd) <-- (Rd) + #data16 + (C)
Encoding:
byte 3: upper 8 bits of #data16
byte 4: lower 8 bits of #data16
ADDC [Rd], #data8
Bytes: 3
Clocks : 4
Operation: ((WS:Rd)) <-- ((WS:Rd)) + #data8 + (C)
Encoding:
byte 3: #data8
0 0 0 1 SZ 1 1 0 d d d d 0 direct: 3 bits
1 0 0 1 0 0 0 1 d d d d 0 0 0 1
1 0 0 1 1 0 0 1 d d d d 0 0 0 1
1 0 0 1 0 0 1 0 0 d d d 0 0 0 1