XA User Guide 6-90 4/17/98
DIV.w 16x8 Signed Division
DIV.d 32x16 Signed Division
DIVU.b 8x8 Unsigned Division
DIVU.w 16x8 Unsigned Division
DIVU.d 32x16 Unsigned Division
Description: The byte or word specified by the source operand is divided into the variable
specified by the destination operand.
For DIVU.b, the destination operand can be any byte register that is the least significant byte of a
word register. For DIV.w and DIVU.w, the destination operand must be a word register, and for
DIV.d and DIVU.d, the destination operand must identify a word register that is the low-word of
a double-word register (see note below). The result is stored in the destination register as the
quotient (8 bits for DIVU.b, DIVU.w, DIV.w, and DIVU.w, and 16-bits for DIV.d and DIVU.d)
in the least significant half and the remainder (same size as the quotient), in the most significant
half (except for DIVU.b which stores the quotient in the destination as identified by the lower half
of a word register and the remainder at upper half of the same word register).
Note: a double word register is double-word aligned in the register file (R1:R0, R3:R2, R5:R4, or
R7:R6).
Size: Byte-Byte, Word-Byte, Double word-Word
Flags Updated: C, V, N, Z
The carry flag is always cleared. The V flag is set in the following cases, otherwise it is cleared:
- DIVU.b: V is set if a divide by 0 occurred. A divide by 0 also causes a hardware trap
to be generated.
- DIV.w, DIVU.w: V is set if the result of the divide is larger than 8 bits (the result does
not fit in the destination).
- DIV.d, DIVU.d: V is set if the result of the divide is larger than 16 bits (the result does
not fit in the destination).
The Z, and N flags are set based on the quotient (integer) portion of the result only and not on the
remainder.
Examples:
a) DIVU.b R4L, R4H - will store the result of the division of R4L by R4H in
R4L and R4H (quotient in register R4L, remainder in register R4H).
b) DIV.w R0, R2L - will store the result of word register R0 divided by byte register
R2L in word register R0 (quotient in register R0L, remainder in register R0H).
c) DIV.d R4,R2 - will store the result of double-word register R5:R4 divided by word
register R2 in double-word register R5:R4 (quotient in R4, remainder in R5)
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