4/17/98 6-103 Addressing Modes and Data Types
JMP Jump double indirect
Syntax: JMP [[Rs+]]
Operation: (PC) <-- (PC) + 2
(PC.15-0) <-- code memory ((WS:Rs))
(PC.0) <-- 0
(Rs) <-- (Rs) + 2
Description: Causes an unconditional branch to the address contained in memory at the address
pointed to by the register specified in the instruction. The specified register is post-incremented.
This 2-byte instruction may be used to compress code size by using it to index through a table of
procedure addresses that are accessed in sequence. Each procedure would end with another JMP
[[R+]] that would immediately go to the next procedure whose address is in the table.
The procedures must be located in the same 64K address page of the executed “Jump Double-
indirect” instruction (although the table could be in any page). This instruction can result in
substantial code compression and hence cost reduction through smaller memory requirements. The
register pointer (index to the table) being automatically post-incremented after the execution of the
instruction. The 24-bit address is identified by combining the low order 16-bit of the PC and either
of high 8-bits of PC or the contents of a byte-size CS register as chosen by the program through a
segment select Special Function Register (SFR).
Note: The subroutine addresses must be word aligned as JMP will force PC.bit0 to 0.
Flags Updated: none
Bytes:2
Clocks:8
Encoding:
1 1 0 1 0 1 1 0
0 1 1 0 0 s s s
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