Panasonic FP0R - Page 311

15-49
Num-
ber
Name
Boo-
lean
Operand
Description
Steps
FP0/FP-e
FP0R
FP
Σ
FP-X
FP2
FP2SH/FP10SH
BCD arithmetic instructions
F40
P40
4-digit BCD
data addition
B+
PB+
S, D (D)+(S)→(D)
5
F41
P41
8-digit BCD
data addition
DB+
PDB+
S, D (D+1, D)+(S+1, S)→(D+1, D)
7
F42
P42
4-digit BCD
data addition
B+
PB+
S1, S2, D (S1)+(S2)→(D)
7
F43
P43
8-digit BCD
data addition
DB+
PDB+
S1, S2, D (S1+1, S1)+(S2+1, S2)→(D+1, D)
11
F45
P45
4-digit BCD data
subtraction
B-
PB-
S, D (D)-(S)→(D)
5
F46
P46
8-digit BCD data
subtraction
DB-
PDB-
S, D (D+1, D)-(S+1, S)→(D+1, D)
7
F47
P47
4-digit BCD data
subtraction
B-
PB-
S1, S2, D (S1)-(S2)→(D)
7
F48
P48
8-digit BCD data
subtraction
DB-
PDB-
S1, S2, D (S1+1, S1)-(S2+1, S2)→(D+1, D)
11
F50
P50
4-digit BCD data
multiplication
B*
PB*
S1, S2, D (S1)X(S2)→(D+1, D)
7
F51
P51
8-digit BCD data
multiplication
DB*
PDB*
S1, S2, D (S1+1, S1)X(S2+1, S2)→(D+3, D+2,
D+1, D)
11
F52
P52
4-digit BCD data
division
B%
PB%
S1, S2, D (S1)÷(S2)→quotient (D)
remainder (DT9015)
7
F53
P53
8-digit BCD data
division
DB%
PDB%
S1, S2, D (S1+1, S1)÷(S2+1, S2)→quotient
(D+1, D)
remainder (DT9016, DT9015)
11
F55
P55
4-digit BCD data
increment
B+1
PB+1
D (D)+1→(D)
3
F56
P56
8-digit BCD data
increment
DB+1
PDB+1
D (D+1, D)+1→(D+1, D)
3
F57
P57
4-digit BCD data
decrement
B-1
PB-1
D (D)-1→(D)
3
F58
P58
8-digit BCD data
decrement
DB-1
PDB-1
D (D+1, D)-1→(D+1, D)
3
Data compare instructions
F60
P60
16-bit data
compare
CMP
PCMP
S1, S2 (S1)>(S2)→R900A: on
(S1)=(S2)→R900B: on
(S1)<(S2)
→
R900C: on
5
F61
P61
32-bit data
compare
DCMP
PDCMP
S1, S2 (S1+1, S1)>(S2+1, S2)→R900A: on
(S1+1, S1)=(S2+1, S2)→R900B: on
(S1+1, S1)<(S2+1, S2)→R900C: on
9
F62
P62
16-bit data band
compare
WIN
PWIN
S1, S2,
S3
(S1)>(S3)→R900A: on
(S2)< or=(S1)< or=(S3)→R900B: on
(S1)<(S2)
→
R900C: on
7
: Available, : Not available, : Not available partially