12713020-002-2 Revision D – April 2004 SSU-2000 User’s Guide 181
Output Module Reference Data
Composite Clock Output Module
Composite Clock Output Module
This section provides reference data for the Composite Clock Output module (part
number 23413158-000-0) used in both the SSU-2000 main shelf and in the optional
SDU-2000 Expansion shelf.
Composite Clock Output Module Overview
The Composite Clock Output module generates 20 signal pairs (TTIP and TRING
signal pairs). Each output is a transformer-coupled symmetrical pair. Each output
pair can be turned off independently of other channels; relays on each output allow
for disconnecting the driver output from the output pins. These outputs are
independently configurable for duty cycle (50/50 or 62.5/37.5) and phase delay from
0 to 3.4 µsec in 8 or more steps. Refer to Changing Factory Defaults, on page 100,
for more information on duty cycle settings.
The outputs are byte and polarity phase aligned with the selected 4 kHz clock. Each
output signal is monitored for a failed output on an independent basis. An output is
said to be failed when either the polarity pulse falls below 2.1 volts base to peak,
when polarity reversal can no longer be detected, or when return to zero cannot be
detected.
The outputs of the Composite Clock Output module meet the criteria set forth in
Bellcore GR-378-CORE and TR-TSY-000458 for signal type, amplitude, and
waveshape. ITU-T Rec. G.703 Centralized Clock is partially supported (50/50 duty
cycle) except only the Bellcore signal levels are generated.
Note: External, customer-supplied padding can be affixed to
attenuate the output level to meet Composite Clock specifications.
To Next Page
Loading...
Need help?
General
