6 — LP MDU, MDU, and modular ONT hardware functional blocks
Alcatel-Lucent 7342 ISAM FTTU ONT R04.05.06 July 2008 6-5
3FE 51892 AAAA TCZZA Edition 01 ONT Product Information Manual
Table 6-3 GPON MAC FPGA features
Gigabit Ethernet multilayer switch
The gigabit Ethernet multilayer switch provides a data path between the optical
functional block and the service board. The switch also supports a PCI bus to the
on-board controller function.
Table 6-4 describes the switch features.
Table 6-4 Gigabit Ethernet multilayer switch features
On-board controller
The OBC provides the communication control processing functions to the multilayer
switch and the service board.
Feature Description
Interfaces Supports two GMII to the gigabit Ethernet multilayer switches as well
as the GPON interface.
Upstream and downstream
FEC
Supports upstream and downstream FEC. FEC is a data encoding
format used with data transmissions in the transport layer between
the LP MDU ONT and an P-OLT. The encoding introduces redundancy,
which allows the decoder to detect and correct the transmission
errors.
AES support AES algorithm, is a symmetric block cipher that can encrypt and
decrypt information. AES algorithm supports key sizes of 128 bits,
192 bits, and 256 bits.
Internal MDU VLAN tagging Supports VLAN tag extraction and insertion functions for internal
traffic grooming and the FCS check/calculate function.
Network timing reference
(NTR)
Supports synchronization for subsystems that need to be referenced
to network synchronization sources.
Feature Description
VLAN cross-connect Cross-connection between VLAN and Ethernet
IGMP mirror Enables IGMP snooping. The IGMP mirror function extracts a packet
from the data stream from the OBC while simultaneously sending it
towards the GPON interface and service board.
IPMC Used to enable video stream multicasting and replication towards the
respective service interfaces
Priority level mapping Eight priority levels of IEEE 802.1P/Q mapped to eight priority queues
for each Ethernet port. Priority queues are configurable for each
Ethernet port.
Line rate switching Applicable to all packet sizes
Double VLAN tagging Supports two VLAN tagged Ethernet frames with an Ethernet packet
size of 2000 bytes
On-chip data packet
memory
Supports 1 Mb of on-chip data packet memory
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