6 — LP MDU, MDU, and modular ONT hardware functional blocks
Alcatel-Lucent 7342 ISAM FTTU ONT R04.05.06 July 2008 6-17
3FE 51892 AAAA TCZZA Edition 01 ONT Product Information Manual
Local switching
The local switching is provided through the 6-port switch supported by the service
unit FPGA.
For upstream traffic, the FPGA adds a VLAN tag based on the QoS tagging mode
specification. For downstream traffic, the FPGA removes the VLAN tag from
VDSL2 traffic. The FPGA supports eight class of service (CoS) queues for the
gigabit Ethernet media independent interface (GMII) port associated with a VDSL2
port. Each 802.1p CoS per VLAN may be associated with a unique port ID.
The FPGA performs switching between the VoIP media independent interface
(MII)/VDSL2 source-synchronous serial media independent interface (SS-SMII)
and the GE port. It supports egress shaping in the downstream direction towards the
data/video subsystem.
The FPGA is configurable through a serial configuration interface from the PON
motherboard and a JTAG boundary scan interface, which is used for production
testing.
Voice subsystem
The voice subsystem provides digital signaling processing (DSP), coder decoder
(CODEC), subscriber line interface circuit (SLIC), and the line protection functions.
The DSP provides an Ethernet MII and a host interface in support of real-time
protocol (RTP) data and control data. The DSP supports VLAN tagging for RTP data
transfers.
The FPGA provides control through the Microprocessor Interface (MPI) of the
CODEC and SLIC.
The line protection block provides a protection circuitry that protects the voice and
VDSL2 circuits from lightning strikes, ac mains cross, line induction from electric
motors and power lines.
Data subsystem
The data and video subsystem contains a DSP, AFE, and four single port drivers. The
DSP is a 4-channel DSL digital transceiver. The AFE is a 4-channel DSL analog
front end.
Network synchronization
The modular ONT subsystems, such as the voice and data subsystems, require voice
network synchronization clocks. The NTR is normally derived from the recovered
GPON clock. During a LOS state on the GPON interface, a minimum 32 ppm clock
is maintained.
The FPGA generates the VoIP subsystem NTR clock. All other voice network
synchronization clocks are locally generated on the service unit. The GPON MAC
FPGA provides NTR for POTS services.
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