AT32F421 Series Reference Manual
2022.11.11 Page 232 Rev 2.02
Channel 1 output switch enable
0: C1ORAW is not affected by EXT input
1: When EXT input level is high, C1ORAW is cleared.
Channel 1 output control
This field defines the behavior of the original signal
C1ORAW.
000: Disconnected. C1ORAW is disconnected from
C1OUT;
001: C1ORAW is high when
TMRx_CVAL=TMR15_C1DT
010: C1ORAW is low when
TMRx_CVAL=TMR15_C1DT
011: Switch C1ORAW level when
TMR15_CVAL=TMR15_C1DT
100: C1ORAW is forced low
101: C1ORAW is forced high.
110: PWM mode A
– OWCDIR=0, C1ORAW is high once
TMR15_C1DT>TMR15_CVAL, else low;
－ OWCDIR=1, C1ORAW is low once TMR15_ C1DT
<TMR15_CVAL, else high;
111: PWM mode B
－ OWCDIR=0, C1ORAW is low once TMR15_ C1DT
>TMR15_CVAL, else high;
－ OWCDIR=1, C1ORAW is high once TMR15_
C1DT <TMR15_CVAL, else low.
Note: In the configurations other than 000’, the C1OUT
is connected to C1ORAW. The C1OUT output level is
not only subject to the changes of C1ORAW, but also the
output polarity set by CCTRL.
Channel 1 output buffer enable
0: Buffer function of TMR15_C1DT is disabled. The new
value written to the TMR15_C1DT takes effect
immediately.
1: Buffer function of TMR15_C1DT is enabled. The value
to be written to the TMR15_C1DT is stored in the buffer
register, and can be sent to the TMR15_C1DT register
only on an overflow event.
Channel 1 output enable immediately
In PWM mode A or B, this bit is used to accelerate the
channel 1 output’s response to the trigger event.
0: Need to compare the CVAL with C1DT before
generating an output
1: No need to compare the CVAL and C1DT. An output
is generated immediately when a trigger event occurs.
Channel 1 configuration
This field is used to define the direction of the channel 1
(input or output), and the selection of input pin when
C1EN=’0’:
00: Output
01: Input, C1IN is mapped on C1IFP1
10: Input, C1IN is mapped on C2IFP1
11: Input, C1IN is mapped on STCI. This mode works
only when the internal trigger input is selected by STIS.
To Next Page