Intel 8253 - Page 493

4/17/98 6-93 Addressing Modes and Data Types
DIVU.w Rd, Rs
(unsigned 16 bits / 8 bits --> 8 bit quotient, 8 bit remainder)
Bytes: 2
Clocks: 12
Operation: (RdL) <-- 8-bit integer portion of (Rd) / (Rs) (unsigned divide)
(RdH) <-- 8-bit remainder of (Rd) / (Rs)
Encoding:
DIVU.w Rd, #data8
(unsigned 16 bits / 8 bits --> 8 bit quotient, 8 bit remainder)
Bytes: 3
Clocks: 12
Operation: (RdL) <-- 8-bit integer portion of (Rd) / #data8 (unsigned divide)
(RdH) <-- 8-bit remainder of (Rd) / #data8
Encoding:
byte 3: #data8
DIVU.d Rd, Rs
(unsigned 32 bits / 16 bits --> 16 bit quotient, 16 bit remainder)
Bytes: 2
Clocks: 22
Operation: (Rd) <-- 16-bit integer portion of (Rd) / (Rs) (unsigned divide)
(Rd+1)<-- 16-bit remainder of (Rd) / (Rs)
Encoding:
1 1 1 0 0 1 0 1 d d d d s s s s
1 1 1 0 1 0 0 0 d d d d 0 0 1 1
1 1 1 0 1 1 0 1 d d d 0 s s s s