4
1.6 Fully Nested Mode
By default, the 82C59A operates in the Fully Nested Mode. It
will remain in this mode until it is programmed otherwise. In
the Fully Nested Mode, interrupts are ordered by priority
from highest to lowest. Initially, the highest priority level is
IR0 with IR7 having the lowest. This ordering can be
changed through the use of priority rotation (see 1.2).
In the Fully Nested Mode, when an interrupt occurs, its
corresponding bit will get set in the Interrupt Request Register
(IRR). When the processor acknowledges the interrupt, the
82C59A will look to the IRR to determine the highest priority
interrupt requesting service. The bit in the In-service Register
(ISR) corresponding to this interrupt will then be set. This bit
remains set until an EOI is sent to the 82C59A.
While an interrupt is being serviced, only higher priority
interrupts will be allowed to interrupt the current interrupt
being serviced. However, lower priority interrupts can be
allowed to interrupt higher priority requests if the 82C59A is
programmed for operation in the Special Mask Mode.
When using the 82C59A in an 80C86- or 80C88-based
system, interrupts will automatically be disabled when the
processor begins servicing an interrupt request. The current
address and the state of the flags in the processor will be
pushed onto the stack. The interrupt-enable flag is then
cleared. To allow interrupts to occur at this point, the STI
instruction can be used. Upon exiting the service routine using
the IRET instruction, execution of the program is resumed at
the point where the interrupt occurred, and the flags are
restored to their original values, thus re-enabling interrupts.
A configuration in which the Fully Nested structure is not
preserved occurs when one or more of the following
conditions occur:
(a) The Automatic EOI mode is being used.
(b) The Special Mask Mode is in use.
(c) A slave 82C59A has a master that is not programmed to
the Special Fully Nested Mode.
Cases (a) and (b) differ from case (c) in that the 82C59A
would allow lower priority interrupt requests the opportunity
to be serviced before higher priority interrupt requests.
1.7 Master
When using multiple 82C59As in a system, one 82C59A has
control over all other 82C59As. This is known as the
“master” interrupt controller. Communication between the
master and the other (slave) 82C59As occurs via the CAS0 -
2 lines. These lines form a private bus between the multiple
82C59As. Also, the INT lines from the slaves are routed to
the master’s IR input pin(s). See Figure 2.
1.8 Slave
A “slave” 82C59A in a system is controlled by a master
82C59A. There is but one “master” in the system, but there
can be up to 8 slave 82C59As. The INT outputs from the
slaves act as inputs to the master through it’s IR inputs.
Communications between the master and slaves occurs via
the CAS0 - 2 lines. See Figure 2.
1.9 Special Fully Nested Mode
The Special Fully Nested Mode (SFNM) is used in a system
having multiple 82C59As where it is necessary to preserve
the priority of interrupts within a slave 82C59A. Only the
master is programmed for the Special Fully Nested Mode
through ICW4. This mode is similar to the Fully Nested
Mode with the following exceptions:
(a) When an interrupt from a particular slave is being
serviced, additional higher priority interrupts from that
slave can cause an interrupt to the master. Normally, a
slave is masked out when its request is in service.
(b) When exiting the Interrupt Service routine, the software
should first issue a non-specific EOI to the slave. The
Inservice Register (ISR) should then be read and
checked to see if its contents are zero. If the register is
empty, the software should then write a non-specific EOI
to the master. Otherwise, a second EOI need not be
written because there are interrupts from that slave still
being processed.
NOTE: Because the Master 82C59A and its slave 82C59As must
be in Fully Nested Mode for this mode to be functional, we could not
utilize Automatic EOIs. These would disturb the Fully Nested
structure, as described in section 1.6.
1.10 Special Mask Mode
The Special Mask Mode is utilized in order to allow interrupts
from all other levels (higher and lower as well) to interrupt the
IR level that is currently being serviced. Invoking this mode of
operation will disturb the fully nested priority structure.
Generally, the Special Mask Mode is selected during the
servicing of an interrupt. The software should first set the bit
corresponding to the IR level being serviced, in the Interrupt
Mask Register (OCW1). The Special Mask Mode and
interrupts should then be enabled. This will allow any of the
IR levels except for those masked off by OCW1 to interrupt
the IR level currently being serviced.
Because this disturbs the Fully Nested Structure, it is
required that a Specific EOI be issued when servicing
interrupts while the Special Mask Mode is in effect. Before
exiting the original interrupt routine, the Special Mask Mode
should be disabled.
1.11 Specific Rotation
By issuing the proper command word to OCW2, the priority
structure of the 82C59A can be dynamically altered. The
command word written to OCW2 would specify which is to
be the lowest priority IR level.
This specific rotation can be accomplished one of two
ways. The first is through a specific EOI. The software can
specify that rotation is to be applied to the IR level provided
with the EOI. The second method is a simple “set priority”
command, in which the lowest priority level is specified with
the command word.
Application Note 109
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