2. Interfaces (controllers) need less circuitry since they do not have to decode 24-bit
addresses (only one byte is needed to designate a unique I/O port).
3. I/O instructions are quicker because they are optimized for a single special purpose. As a
rule, the more general an operation must be, the more complex and thus the slower it will
be.
4. In the case of true isolated I/O with a dedicated bus, there is less bus contention, which
also leads to increased performance.
5. A machine with isolated I/O can emulate memory-mapped I/O if desired, with no loss of
performance over a true memory mapped system. Note that a system with memory
mapped I/O cannot emulate a machine with isolated I/O without a loss of performance
over a true isolated I/O machine because it inherently lacks the additional hardware and
the "extra" address space of a machine designed to use isolated I/O.
Caution: I/O ports (even in the case of memory mapped I/O) are not part of the physical RAM.
Ports are registers on an I/O interface chip. Unlike the CPU registers, however, they have no
names, but instead have addresses. With memory-mapped I/O, they are logically part of memory,
and their addresses are an extension of the addresses for standard RAM chips, but physically
they are on separate chips. With isolated I/O, they occupy a separate address space from standard
RAM, so obviously they must be on separate chips. In either case, it is well to remember that
standard RAM itself is essentially a large collection of slow "registers," accessed via an address,
rather than a name. If you look at a memory add-on card, you will notice that it includes several
separate chips. Each chip contains a portion of the total memory. If you think about it this way,
the notion of I/O ports should seem more intuitive.
Case study: ACIA (Asynchronous Communications Interface Adapter)
The ACIA is an interface for various serial communications devices (typically a modem), that
can both transmit and receive data, similar in function to the UART (Universal Asynchronous
Receiver Transmitter). Serial devices transmit or receive data one bit at a time over a single wire
(such as a telephone line). Several data bits in succession (usually seven or eight of them, to form
a single character) make up a single data item. If the ACIA is receiving data, it must collect the
bits until there are enough to send to the CPU as a character. If the ACIA is transmitting data, it
receives an entire character from the CPU and it must store the bits until it can send all of them
(one at a time). For this reason, it has a set of buffers, or memory locations (ports), connected to
the data bus that store the incoming or outgoing data bits. The ACIA is also connected to the
address bus so that the CPU can gain access to particular registers on the interface. Finally, the
ACIA is connected to an interrupt line and to the device itself.
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