32 SDA-OM-E Rev H
Serial Trigger
Available on SDA 6000A (XXL), SDA 5000A (XXL), SDA 4000A (XXL)
Data Type
NRZ encoded for clock extraction (needs
edge density > 20%)
Sensitivity
1 division minimum and at least 10 mV
Min. Frequency
50 MHz
Max. Frequency
2.7 GHz
Serial Trigger Length
up to 32 bits
Clock/Data Output Connector Type
SMA
Clock/Data Output
1/2 amplitude, AC coupled LVPCL
Clock/Data Output Voltage Swing (into 50 Ω)
400 mV typical
Clock /Data Output Rise/Fall Time
200 ps typical
Recovered CLK and DATA Jitter
0.015 UI rms typical
Recovered CLK and DATA Phase Relationship
Data is centered on the rising edge of the
clock
Source
Channel 4 only
Trigger Sensitivity
1 division minimum and at least 10 mV
Clock Recovery
custom filter settings
damping factor
natural frequency
number of poles
Standard PLL settings
(FC, Golden, PCIe, DVI, Custom)
Jitter Analysis
advanced (peak-peak, rms)
basic (Tj, Rj, Dj)
bathtub curve
conventional
cycle-cycle jitter
Dj breakdown
edge to edge (data to data)
edge to reference (data to
clock)
effective
filtered jitter
half-period jitter
ISI plot
jitter histogram
jitter wizard
MJSQ
period jitter
periodic jitter (Pj) with peak frequency listing
synchronous N-cycle with bit pattern display
TIE clock jitter
TIE jitter