Parameter Name / value range / [default seng] Info
0x2006:032 Error history buer: Message 26
•
Read only
0x2006:033 Error hist
ory buer: Message 27
•
Read only
0x2006:034 Error history buer: Message 28
•
Read only
0x2006:035 Error history buer: Message 29
•
Read only
0x2006:036 Error history buer: Message 30
•
Read only
0x2006:037 Error history buer: Message 31
•
Read only
5.3.3 Inverter diagnoscs
The following parameters supply some informaon about the current operang status of the
inverter.
This includes the f
ollowing informaon:
•
Acve access protecon aer log-in by means of PIN1/PIN2
•
Currently loaded parameter sengs
•
Cause(s) of controller inhibit, quick st
op and stop.
•
Acve control source and acve setpoint source
•
Acve operang mode
•
Keypad sta
tus
•
Status of the internal motor control
Parameter Name / value range / [default seng] Info
0x2040
(PAR 197)
Access protecon status
(
Protecon status)
•
Read only
Display of the acve access protecon aer log-in via PIN1/PIN2.
•
0 = write access to all parameters possible.
•
1 ≡ no write access.
•
2 = write access only possible to parameters of group 0 (Favorites).
0x2827
(PAR 198)
Currently loaded parameter sengs
(Status of load. par)
•
Read only
Display of the parameter sengs currently loaded.
0 User sengs
1 Reset 60 Hz seng Delivery status (Lenze seng) for 50 Hz
2 Reset 50 Hz seng Delivery status (Lenze seng) for 60 Hz
3 OEM default sengs
0x282A:001
(PAR 126/001)
Status words: Cause of controller inhibit
(Status words: Cause of contr. inhibit)
•
Read only
Bit coded display of the cause(s) of controller inhibit.
Bit 0 Flexible I/O conguraon 1 ≡ controller inhibit was acvated by the trigger set in 0x2631:001
(PAR 400/001).
Bit 1 Network 1 ≡ controller inhibit was acvated via network.
Bit 2 Axis command 1 ≡ controller inhibit was acvated via axis command 0x2822:001.
Bit 3 Reserved -
Bit 4
Bit 5
Bit 6
Bit 7 Drive not ready
Bit 8 Reserved -
Bit 9 Motor parameter idencaon 1 ≡ controller inhibit was acvated by the "Automac motor parameter
idencaon" funcon.
Bit 10 Automac holding brake control 1 ≡ controller inhibit was acvated by the "Holding brake control" func-
on.
Bit 11 Reserved -
Bit 12 CiA402 controller inhibit 1 ≡ controller inhibit was acvated by the internal state machine of the
inverter.
Bit 13
CIA402 Quick stop opon code 2 1 ≡ controller inhibit was acvated by the "Quick stop" funcon.
Diagnoscs and fault eliminaon
Diagnoscs
Inverter diagnoscs
48