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ST STM32WL55JC User Manual

ST STM32WL55JC
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Contents RM0453
14/1454 RM0453 Rev 2
10.4.23 GPIOH mode register (GPIOH_MODER) . . . . . . . . . . . . . . . . . . . . . . 417
10.4.24 GPIO H output type register (GPIOH_OTYPER) . . . . . . . . . . . . . . . . . 417
10.4.25 GPIOH output speed register (GPIOH_OSPEEDR) . . . . . . . . . . . . . . 418
10.4.26 GPIOH pull-up/pull-down register (GPIOH_PUPDR) . . . . . . . . . . . . . 418
10.4.27 GPIOH input data register (GPIOH_IDR) . . . . . . . . . . . . . . . . . . . . . . 419
10.4.28 GPIOH output data register (GPIOH_ODR) . . . . . . . . . . . . . . . . . . . . 419
10.4.29 GPIO H bit set/reset register (GPIOH_BSRR) . . . . . . . . . . . . . . . . . . . 420
10.4.30 GPIOH configuration lock register (GPIOH_LCKR) . . . . . . . . . . . . . . . 420
10.4.31 GPIOH alternate function low register (GPIOH_AFRL) . . . . . . . . . . . . 421
10.4.32 GPIOH bit reset register (GPIOH_BRR) . . . . . . . . . . . . . . . . . . . . . . . 422
10.4.33 GPIOA register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
10.4.34 GPIOB register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
10.4.35 GPIOC register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424
10.4.36 GPIOH register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
11 System configuration controller (SYSCFG) . . . . . . . . . . . . . . . . . . . . 427
11.1 SYSCFG main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427
11.2 SYSCFG registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427
11.2.1 SYSCFG memory remap register (SYSCFG_MEMRMP) . . . . . . . . . . 427
11.2.2 SYSCFG configuration register 1 (SYSCFG_CFGR1) . . . . . . . . . . . . 428
11.2.3 SYSCFG external interrupt configuration register 1
(SYSCFG_EXTICR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
11.2.4 SYSCFG external interrupt configuration register 2
(SYSCFG_EXTICR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430
11.2.5 SYSCFG external interrupt configuration register 3
(SYSCFG_EXTICR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
11.2.6 SYSCFG external interrupt configuration register 4
(SYSCFG_EXTICR4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433
11.2.7 SYSCFG SRAM control and status register (SYSCFG_SCSR) . . . . . 434
11.2.8 SYSCFG configuration register 2 (SYSCFG_CFGR2) . . . . . . . . . . . . 435
11.2.9 SYSCFG SRAM2 write protection register (SYSCFG_SWPR) . . . . . . 436
11.2.10 SYSCFG SRAM2 key register (SYSCFG_SKR) . . . . . . . . . . . . . . . . . 437
11.2.11 SYSCFG CPU1 interrupt mask register 1 (SYSCFG_IMR1) . . . . . . . . 438
11.2.12 SYSCFG CPU1 interrupt mask register 2 (SYSCFG_IMR2) . . . . . . . . 439
11.2.13 SYSCFG CPU2 interrupt mask register 1 (SYSCFG_C2IMR1) . . . . . 439
11.2.14 SYSCFG CPU2 interrupt mask register 2 (SYSCFG_C2IMR2) . . . . . 441
11.2.15 SYSCFG radio debug control register (SYSCFG_RFDCR) . . . . . . . . 442
11.2.16 SYSCFG register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 443

Table of Contents

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ST STM32WL55JC Specifications

General IconGeneral
BrandST
ModelSTM32WL55JC
CategoryMicrocontrollers
LanguageEnglish

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