TMS320C6455
SPRS276M –MAY 2005–REVISED MARCH 2012
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Table 7-10. C6455 System Event Mapping (continued)
EVENT NUMBER INTERRUPT EVENT DESCRIPTION
Reserved. These system events are not connected and, therefore,
102 - 112 Reserved
not used.
113
(2)
L1P_ED1 L1P single bit error detected during DMA read
Reserved. These system events are not connected and, therefore,
114 - 115 Reserved
not used.
116
(2)
L2_ED1 L2 single bit error detected
117
(2)
L2_ED2 L2 two bit error detected
118
(2)
PDC_INT Powerdown sleep interrupt
Reserved. This system event is not connected and, therefore, not
119 Reserved
used.
120
(2)
L1P_CMPA L1P CPU memory protection fault
121
(2)
L1P_DMPA L1P DMA memory protection fault
122
(2)
L1D_CMPA L1D CPU memory protection fault
123
(3)
L1D_DMPA L1D DMA memory protection fault
124
(3)
L2_CMPA L2 CPU memory protection fault
125
(3)
L2_DMPA L2 DMA memory protection fault
126
(3)
IDMA_CMPA IDMA CPU memory protection fault
127
(3)
IDMA_BUSERR IDMA bus error interrupt
(3) This system event is generated from within the C64x+ megamodule.
122 C64x+ Peripheral Information and Electrical Specifications Copyright © 2005–2012, Texas Instruments Incorporated
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