TMS320C6455
SPRS276M –MAY 2005–REVISED MARCH 2012
www.ti.com
7.21.3 GPIO Electrical Data/Timing
Table 7-114. Timing Requirements for GPIO Inputs
(1) (2)
(see Figure 7-78)
-720
-850
A-1000/-1000
NO. UNIT
-1200
MIN MAX
1 t
w(GPIH)
Pulse duration, GPIx high 12P ns
2 t
w(GPIL)
Pulse duration, GPIx low 12P ns
(1) P = 1/CPU clock frequency in ns. For example, when running parts at 1000 MHz, use P = 1 ns.
(2) The pulse width given is sufficient to generate a CPU interrupt or an EDMA event. However, if a user wants to have the DSP recognize
the GPIx changes through software polling of the GPIO register, the GPIx duration must be extended to at least 24P to allow the DSP
enough time to access the GPIO register through the CFGBUS.
Table 7-115. Switching Characteristics Over Recommended Operating Conditions for GPIO Outputs
(1)
(see Figure 7-78)
-720
-850
A-1000/-1000
NO. PARAMETER UNIT
-1200
MIN MAX
3 t
w(GPOH)
Pulse duration, GPOx high 36P - 8
(2)
ns
4 t
w(GPOL)
Pulse duration, GPOx low 36P - 8
(2)
ns
(1) P = 1/CPU clock frequency in ns. For example, when running parts at 1000 MHz, use P = 1 ns.
(2) This parameter value should not be used as a maximum performance specification. Actual performance of back-to-back accesses of the
GPIO is dependent upon internal bus activity.
Figure 7-78. GPIO Port Timing
246 C64x+ Peripheral Information and Electrical Specifications Copyright © 2005–2012, Texas Instruments Incorporated
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