Texas Instruments TMS320C6455 User Manual

HCS
HAS
HCNTL[1:0]
HR/W
HHWIL
HSTROBE
(A)
HD[15:0]
HRDY
(B)
16
15
37
13
14
16
15
37
13
3
1
2
3
1
2
38
7
4
6
TMS320C6455
www.ti.com SPRS276M –MAY 2005–REVISED MARCH 2012
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-
incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on
the HPI peripheral, see the TMS320C645x DSP Host Port Interface (HPI) User's Guide (literature number
SPRU969) .
Figure 7-44. HPI16 Read Timing (HAS Not Used, Tied High)
Copyright © 2005–2012, Texas Instruments Incorporated C64x+ Peripheral Information and Electrical Specifications 177
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Texas Instruments TMS320C6455 Specifications

General

Brand	Texas Instruments
Model	TMS320C6455
Category	Signal Processors
Language	English