TMS320C6455
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SPRS276M –MAY 2005–REVISED MARCH 2012
Table 7-66. Timing Requirements for McBSP as SPI Master or Slave: CLKSTP = 10b, CLKXP = 1
(1) (2)
(see Figure 7-56)
-720
-850
A-1000/-1000
NO. UNIT
-1200
MASTER SLAVE
MIN MAX MIN MAX
4 t
su(DRV-CKXH)
Setup time, DR valid before CLKX high 12 2 - 18P ns
5 t
h(CKXH-DRV)
Hold time, DR valid after CLKX high 4 5 + 36P ns
(1) P = 1/CPU clock frequency in ns. For example, when running parts at 1000 MHz, use P = 1 ns.
(2) For all SPI Slave modes, CLKG is programmed as 1/6 of the CPU clock by setting CLKSM = CLKGDV = 1.
Copyright © 2005–2012, Texas Instruments Incorporated C64x+ Peripheral Information and Electrical Specifications 195
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