Texas Instruments TMS320C6455 User Manual

RGREFCLK
(Output)
2
3
4
4
1
TMS320C6455
SPRS276M –MAY 2005–REVISED MARCH 2012 www.ti.com
7.14.3.3 EMAC RGMII Electrical Data/Timing
An extra clock signal, RGREFCLK, running at 125 MHz is included as a convenience to the user. Note
that this reference clock is not a free-running clock. This should only be used by an external device if it
does not expect a valid clock during device reset.
Table 7-84. Switching Characteristics Over Recommended Operating Conditions for EMAC RGREFCLK -
RGMII Operation
(see Figure 7-68)
-720
-850
A-1000/-1000
NO. PARAMETER UNIT
-1200
MIN MAX
1 t
c(RGFCLK)
Cycle time, RGREFCLK 8 - 0.8 8 + 0.8 ns
2 t
w(RGFCLKH)
Pulse duration, RGREFCLK high 3.2 4.8 ns
3 t
w(RGFCLKL)
Pulse duration, RGREFCLK low 3.2 4.8 ns
4 t
t(RGFCLK)
Transition time, RGREFCLK 0.75 ns
Figure 7-68. RGREFCLK Timing
Table 7-85. Timing Requirements for RGRXC - RGMII Operation
(see Figure 7-69)
-720
-850
A-1000/-1000
NO. UNIT
-1200
MIN MAX
10 Mbps 360 440
1 t
c(RGRXC)
Cycle time, RGRXC 100 Mbps 36 44 ns
1000 Mbps 7.2 8.8
10 Mbps 0.40*t
c(RGRXC)
0.60*t
c(RGRXC)
2 t
w(RGRXCH)
Pulse duration, RGRXC high 100 Mbps 0.40*t
c(RGRXC)
0.60*t
c(RGRXC)
ns
1000 Mbps 0.45*t
c(RGRXC)
0.55*t
c(RGRXC)
10 Mbps 0.40*t
c(RGRXC)
0.60*t
c(RGRXC)
3 t
w(RGRXCL)
Pulse duration, RGRXC low 100 Mbps 0.40*t
c(RGRXC)
0.60*t
c(RGRXC)
ns
1000 Mbps 0.45*t
c(RGRXC)
0.55*t
c(RGRXC)
10 Mbps 0.75
4 t
t(RGRXC)
Transition time, RGRXC 100 Mbps 0.75 ns
1000 Mbps 0.75
212 C64x+ Peripheral Information and Electrical Specifications Copyright © 2005–2012, Texas Instruments Incorporated
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Texas Instruments TMS320C6455 Specifications

General

Brand	Texas Instruments
Model	TMS320C6455
Category	Signal Processors
Language	English