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Texas Instruments TMS320C6455 User Manual

Texas Instruments TMS320C6455
257 pages
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13121110987654321
13121110987654321
RGRXD2
RGTXD3
DV
DD33
UXDATA2/
MTXD2
V
SS
UXDATA0/
MTXD0/
RMTXD0
CV
DDMON
UXDATA6/
MTXD6
V
SS
URADDR3/
PREQ
/
GP[15]
URADDR2/
PINTA
/
GP[14]
URDATA2/
MRXD2
URDATA3/
MRXD3
URDATA0/
MRXD0/
RMRXD0
V
SS
UXDATA3/
MTXD3
UXSOC/
MCOL
URDATA5/
MRXD5
UXDATA1/
MTXD1/
RMTXD1
DV
DD15
UXDATA4/
MTXD4
URCLAV/
MCRS/
RMCRSDV
UXADDR0/
PTRDY
UXDATA7/
MTXD7
UXCLK/
MTCLK/
RMREFCLK
UXADDR4/
MDCLK
RGRXD3
DV
DD18
DED1
DSDDQS0
DSDDQM0 DED2
DSDDQS0
DED6
DED7
DED8
DED9
DED10
DSDDQM1
DSDDQS1
DED15
DED14
V
SS
RSV25
RSV35
RSV34
V
SS
DV
DD15
V
SS
V
SS
DV
DD15
V
SS
V
SS
DSDWE
DSDRAS
DSDCAS
V
SS
DED3
RSV29
DV
DD33
RGTXD0
RGTXD1
RGREFCLK
RGTXCTL
DV
DD15MON
RGRXD1 RSV18
RSV13
UXCLAV/
GMTCLK
UXDATA5/
MTXD5
DSDDQ
GATE0
DED0
DV
DD15
DED12 DV
DD18
DED5
RGRXD0
DV
DD33
V
SS
V
SS
V
SS
DV
DD33MON
V
SS
RSV21 DED13 DED4 V
SS
AV
DLL1
V
SS
V
REFHSTL
RGMDCLK RSV24
DSDDQ
GATE1
RGRXCTL V
SS
DV
DD15
RGTXC
RGRXC DSDDQS1 DV
DD18
DV
DD18
RSV14
DV
DD18
URDATA7/
MRXD7
V
SS
CV
DD
RSV28 CV
DD
URADDR4/
PCBE0
/
GP[2]
UXADDR2/
PCBE3
DV
DD33
UXENB
/
MTXEN/
RMTXEN
V
SS
DV
DD33
V
SS
RGMDIO PLLV2 V
SS
DED11
DV
DD18
DV
DD18
URDATA4/
MRXD4
UXADDR3/
MDIO
RGTXD2
B
DV
DD15
V
SS
DV
DD18
DV
DD18
RSV07 DV
DD18
CLKIN2DV
DD33
V
SS
V
SS
V
SS
V
SS
V
SS
C
V
SS
URENB
/
MRXDV
URSOC/
MRXER/
RMRXER
CV
DD
URDATA1/
MRXD1/
RMRXD1
URDATA6/
MRXD6
URCLK/
MRCLK
DV
DD15
V
SS
V
SS
14
DDR2
CLKOUT
V
REFSSTL
DSDCKE
DCE0
CV
DD
DDR2
CLKOUT
V
SS
V
SS
DV
DD18
CV
DD
15
DEA13
DBA0
DBA1
DBA2
V
SS
DEA12
CV
DD
DV
DD18
V
SS
V
SS
14 15
CV
DD
RSV04
V
SS
CV
DD
V
SS
CV
DD
RSV05
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TMS320C6455
www.ti.com
SPRS276M MAY 2005REVISED MARCH 2012
Figure 2-5. C6455 Pin Map (Bottom View) [Quadrant D]
Copyright © 2005–2012, Texas Instruments Incorporated Device Overview 19
Submit Documentation Feedback
Product Folder Link(s): TMS320C6455

Table of Contents

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Texas Instruments TMS320C6455 Specifications

General IconGeneral
Clock Speed1.0 GHz
Core Count1
On-Chip RAMYes
Data Width32-bit
Data Bus Width64-bit
Operating Voltage1.2 V
I/O Voltage3.3 V
Instruction SetTMS320C64x+
MemoryDDR2
Package TypeBGA
External Memory InterfaceEMIF
InterfacesI2C, SPI

Summary

1 Features

2 Device Overview

2.2 CPU (DSP Core) Description

Details the C64x+ CPU core, functional units, register files, and data paths.

2.4 Boot Sequence

Explains the process of initializing the DSP's memory and registers at reset.

3 Device Configuration

3.1 Device Configuration at Device Reset

Details configuration pins (AEA, ABA, PCI_EN) for boot mode, clock source, and endianness.

5 C64x+ Megamodule

5.1 Memory Architecture

Describes the L2, L1P, and L1D memory configurations and sizes.

6 Device Operating Conditions

6.1 Absolute Maximum Ratings Over Operating Case Temperature Range (Unless Otherwise Noted)

Specifies stress ratings for voltage, temperature, and other conditions beyond which damage may occur.

6.2 Recommended Operating Conditions

Lists recommended operating ranges for supply voltages, input/output, and temperatures.

7 C64x+ Peripheral Information and Electrical Specifications

7.3 Power Supplies

Covers power supply sequencing, decoupling, and power-down operation.

7.4 Enhanced Direct Memory Access (EDMA3) Controller

Details EDMA3 features like transfer dimensions, PaRAM entries, and DMA channels.

7.6 Reset Controller

Describes different reset types (POR, Warm, Max, System, CPU) and their effects.

7.7 PLL1 and PLL1 Controller

Details PLL1 controller operation, clocks, and registers for frequency synthesis.

7.8 PLL2 and PLL2 Controller

Describes PLL2 controller operation, clocks, and registers for EMAC and DDR2 memory.

7.9 DDR2 Memory Controller

Explains DDR2 interface, device-specific information, and memory topologies.

7.10 External Memory Interface A (EMIFA)

Covers EMIFA interface capabilities for various external devices and timing.

7.11 I2C Peripheral

Describes the I2C module, its features, and device-specific information.

7.14 Ethernet MAC (EMAC)

Describes EMAC module, interface modes (MII, RMII, GMII, RGMII), and control modules.

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