Texas Instruments TMS320C6455 User Manual

TMS320C6455
www.ti.com SPRS276M –MAY 2005–REVISED MARCH 2012
Table 2-3. Terminal Functions (continued)
SIGNAL
TYPE
(1)
IPD/IPU
(2)
DESCRIPTION
NAME NO.
U15
U17
U19
U24
V2
V6
V12
V14
V16
V18
V23
W7
W11
W13
W15
W17
V
SS
GND Ground pins
W19
W24
Y6
Y23
AA2
AA7
AA24
AB6
AB23
AC7
AC8
AC10
AC12
AC14
AC16
AC18
Copyright © 2005–2012, Texas Instruments Incorporated Device Overview 49
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Texas Instruments TMS320C6455 Specifications

General

Clock Speed	1.0 GHz
Core Count	1
On-Chip RAM	Yes
Data Width	32-bit
Data Bus Width	64-bit
Operating Voltage	1.2 V
I/O Voltage	3.3 V
Instruction Set	TMS320C64x+
Memory	DDR2
Package Type	BGA
External Memory Interface	EMIF
Interfaces	I2C, SPI

Summary

1 Features

2 Device Overview

2.1 Device Characteristics

2.2 CPU (DSP Core) Description

Details the C64x+ CPU core, functional units, register files, and data paths.

2.3 Memory Map Summary

2.4 Boot Sequence

Explains the process of initializing the DSP's memory and registers at reset.

3 Device Configuration

3.1 Device Configuration at Device Reset

Details configuration pins (AEA, ABA, PCI_EN) for boot mode, clock source, and endianness.

3.2 Peripheral Configuration at Device Reset

3.4 Device State Control Registers

3.5 Device Status Register Description

5 C64x+ Megamodule

5.1 Memory Architecture

Describes the L2, L1P, and L1D memory configurations and sizes.

5.2 Memory Protection

5.3 Bandwidth Management

6 Device Operating Conditions

6.1 Absolute Maximum Ratings Over Operating Case Temperature Range (Unless Otherwise Noted)

Specifies stress ratings for voltage, temperature, and other conditions beyond which damage may occur.

6.2 Recommended Operating Conditions

Lists recommended operating ranges for supply voltages, input/output, and temperatures.

6.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Case Temperature (Unless Otherwise Noted)

Details electrical characteristics under specified operating conditions.

7 C64x+ Peripheral Information and Electrical Specifications

7.1 Parameter Information

7.3 Power Supplies

Covers power supply sequencing, decoupling, and power-down operation.

7.4 Enhanced Direct Memory Access (EDMA3) Controller

Details EDMA3 features like transfer dimensions, PaRAM entries, and DMA channels.

7.5 Interrupts

7.6 Reset Controller

Describes different reset types (POR, Warm, Max, System, CPU) and their effects.

7.7 PLL1 and PLL1 Controller

Details PLL1 controller operation, clocks, and registers for frequency synthesis.

7.8 PLL2 and PLL2 Controller

Describes PLL2 controller operation, clocks, and registers for EMAC and DDR2 memory.

7.9 DDR2 Memory Controller

Explains DDR2 interface, device-specific information, and memory topologies.

7.10 External Memory Interface A (EMIFA)

Covers EMIFA interface capabilities for various external devices and timing.

7.11 I2C Peripheral

Describes the I2C module, its features, and device-specific information.

7.12 Host-Port Interface (HPI) Peripheral

7.13 Multichannel Buffered Serial Port (McBSP)

7.14 Ethernet MAC (EMAC)

Describes EMAC module, interface modes (MII, RMII, GMII, RGMII), and control modules.

7.15 Timers

7.16 Enhanced Viterbi-Decoder Coprocessor (VCP2)

7.17 Enhanced Turbo Decoder Coprocessor (TCP2)

7.18 Peripheral Component Interconnect (PCI)

7.20 Serial RapidIO (SRIO) Port

7.22 Emulation Features and Capability