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ARM Cortex-M4 - SSAT and USAT

ARM Cortex-M4
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The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-96
ID121610 Non-Confidential
3.7.1 SSAT and USAT
Signed Saturate and Unsigned Saturate to any bit position, with optional shift before saturating.
Syntax
op{cond} Rd, #n, Rm {, shift #s}
where:
op
Is one of:
SSAT
Saturates a signed value to a signed range.
USAT
Saturates a signed value to an unsigned range.
cond
Is an optional condition code, see Conditional execution on page 3-18.
Rd
Specifies the destination register.
n
Specifies the bit position to saturate to:
n
ranges from 1 to 32 for
SSAT
n
ranges from 0 to 31 for
USAT
.
Rm
Specifies the register containing the value to saturate.
shift #s
Is an optional shift applied to
Rm
before saturating. It must be one of the following:
ASR #s
where
s
is in the range 1 to 31
LSL #s
where
s
is in the range 0 to 31.
Operation
These instructions saturate to a signed or unsigned
n
-bit value.
The
SSAT
instruction applies the specified shift, then saturates to the signed range
2
n–1
x 2
n–1
1.
The
USAT
instruction applies the specified shift, then saturates to the unsigned range
0 x 2
n
1.
Restrictions
Do not use SP and do not use PC
.
Condition flags
These instructions do not affect the condition code flags.
If saturation occurs, these instructions set the Q flag to 1.
Examples
SSAT R7, #16, R7, LSL #4 ; Logical shift left value in R7 by 4, then
; saturate it as a signed 16-bit value and
; write it back to R7
USATNE R0, #7, R5 ; Conditionally saturate value in R5 as an
; unsigned 7 bit value and write it to R0.

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