The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-146
ID121610 Non-Confidential
3.11.19 VMRS
Move to ARM Core register from floating-point System Register.
Syntax
VMRS{cond} Rt, FPSCR
VMRS{cond} APSR_nzcv, FPSCR
where:
cond
Is an optional condition code, see Conditional execution on page 3-18.
Rt
Specifies the destination ARM core register. This register can be R0-R14.
APSR_nzcv
Transfer floating-point flags to the APSR flags.
Operation
This instruction performs one of the following actions:
• Copies the value of the
FPSCR
to a general-purpose register.
• Copies the value of the
FPSCR
flag bits to the APSR N, Z, C, and V flags
.
Restrictions
Rt cannot be PC or SP.
Condition flags
These instructions optionally change the flags: N, Z, C, V