ARM Cortex-M4 - VMOV Two ARM Core Registers to Two Single Precision

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-144
ID121610 Non-Confidential
3.11.17 VMOV Two ARM Core registers to two single precision
Transfers two consecutively numbered single-precision registers to and from two ARM core
registers.
Syntax
VMOV{cond} Sm, Sm1, Rt, Rt2
VMOV{cond} Rt, Rt2, Sm, Sm
where:
cond Is an optional condition code, see Conditional execution on page 3-18.
Sm Specifies the first single-precision register.
Sm1 Specifies the second single-precision register. This is the next single-precision
register after
Sm .
Rt Specifies the ARM core register that Sm is transferred to or from.
Rt2 Specifies the The ARM core register that Sm1 is transferred to or from.
Operation
This instruction transfers:
• The contents of two consecutively numbered single-precision registers to two ARM core
registers.
• The contents of two ARM core registers to a pair of single-precision registers.
Restrictions
The restrictions are:
• The floating-point registers must be contiguous, one after the other.
• The ARM core registers do not have to be contiguous.
• Rt cannot be PC or SP.
Condition flags
These instructions do not change the flags.