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ARM Cortex-M4 - Programming Hints for the Synchronization Primitives; CMSIS Functions for Exclusive Access Instructions

ARM Cortex-M4
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The Cortex-M4 Processor
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 2-20
ID121610 Non-Confidential
An exception occurs. This means the processor can resolve semaphore conflicts between
different threads.
In a multiprocessor implementation:
executing a
CLREX
instruction removes only the local exclusive access tag for the processor
executing a Store-Exclusive instruction, or an exception. removes the local exclusive
access tags, and global exclusive access tags for the processor.
For more information about the synchronization primitive instructions, see LDREX and STREX
on page 3-36 and CLREX on page 3-38.
2.2.8 Programming hints for the synchronization primitives
ISO/IEC C cannot directly generate the exclusive access instructions. CMSIS provides
functions for generation of these instructions:
Table 2-15 CMSIS functions for exclusive access instructions
Instruction CMSIS function
LDREX uint32_t __LDREXW (uint32_t *addr)
LDREXH uint16_t __LDREXH (uint16_t *addr)
LDREXB uint8_t __LDREXB (uint8_t *addr)
STREX uint32_t __STREXW (uint32_t value, uint32_t *addr)
STREXH uint32_t __STREXH (uint16_t value, uint16_t *addr)
STREXB uint32_t __STREXB (uint8_t value, uint8_t *addr)
CLREX void __CLREX (void)

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