ARM Cortex-M4 - Ror; Rrx

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-15
ID121610 Non-Confidential
You can use he LSL #n operation to multiply the value in the register Rm by 2
n
, if the value is
regarded as an unsigned integer or a two’s complement signed integer. Overflow can occur
without warning.
When the instruction is
LSLS or when LSL #n , with non-zero n , is used in Operand2 with the
instructions
MOVS , MVNS , ANDS , ORRS , ORNS , EORS , BICS , TEQ or TST , the carry flag is updated to the
last bit shifted out, bit[
32 - n ], of the register Rm . These instructions do not affect the carry flag
when used with
LSL #0 .
Note
• If n is 32 or more, then all the bits in the result are cleared to 0.
• If
n is 33 or more and the carry flag is updated, it is updated to 0.
Figure 3-3 LSL #3
ROR
Rotate right by
n bits moves the left-hand 32 - n bits of the register Rm , to the right by n places, into
the right-hand
32 - n bits of the result. And it moves the right-hand n bits of the register into the
left-hand
n bits of the result. See Figure 3-4.
When the instruction is
RORS or when ROR #n is used in Operand2 with the instructions MOVS , MVNS ,
ANDS , ORRS , ORNS , EORS , BICS , TEQ or TST , the carry flag is updated to the last bit rotation, bit[ n -1],
of the register
Rm .
Note
• If n is 32, then the value of the result is same as the value in Rm , and if the carry flag is
updated, it is updated to bit[31] of
Rm .
•
ROR with shift length, n , more than 32 is the same as ROR with shift length n -32.
Figure 3-4 ROR #3
RRX
Rotate right with extend moves the bits of the register
Rm to the right by one bit. And it copies
the carry flag into bit[31] of the result. See Figure 3-5 on page 3-16.
When the instruction is
RRXS or when RRX is used in Operand2 with the instructions MOVS , MVNS ,
ANDS , ORRS , ORNS , EORS , BICS , TEQ or TST , the carry flag is updated to bit[0] of the register Rm .
031 5 4 3 2 1
Carry
Flag
00
0
Carry
Flag
031 5 4 3 2 1