ARM Cortex-M4 - Operands; Restrictions When Using PC or SP; Flexible Second Operand

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-12
ID121610 Non-Confidential
3.3.1 Operands
An instruction operand can be an ARM register, a constant, or another instruction-specific
parameter. Instructions act on the operands and often store the result in a destination register.
When there is a destination register in the instruction, it is usually specified before the operands.
Operands in some instructions are flexible in that they can either be a register or a constant. See
Flexible second operand.
3.3.2 Restrictions when using PC or SP
Many instructions have restrictions on whether you can use the Program Counter (PC) or Stack
Pointer (SP) for the operands or destination register. See instruction descriptions for more
information.
Note
Bit[0] of any address you write to the PC with a BX , BLX , LDM , LDR , or POP instruction must be 1
for correct execution, because this bit indicates the required instruction set, and the Cortex-M4
processor only supports Thumb instructions.
3.3.3 Flexible second operand
Many general data processing instructions have a flexible second operand. This is shown as
Operand2 in the descriptions of the syntax of each instruction.
Operand2 can be a:
• Constant
• Register with optional shift on page 3-13
Constant
You specify an Operand2 constant in the form:
#constant
where constant can be:
• any constant that can be produced by shifting an 8-bit value left by any number of bits
within a 32-bit word
• any constant of the form
0x00XY00XY
• any constant of the form 0xXY00XY00
• any constant of the form 0xXYXYXYXY .
Note
In the constants shown above, X and Y are hexadecimal digits.
In addition, in a small number of instructions, constant can take a wider range of values. These
are described in the individual instruction descriptions.
When an Operand2 constant is used with the instructions
MOVS , MVNS , ANDS , ORRS , ORNS , EORS , BICS ,
TEQ or TST , the carry flag is updated to bit[31] of the constant, if the constant is greater than 255
and can be produced by shifting an 8-bit value. These instructions do not affect the carry flag if
Operand2 is any other constant.