ARM Cortex-M4 - Application Program Status Register

The Cortex-M4 Processor
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 2-5
ID121610 Non-Confidential
The PSR combinations and attributes are:
See the instruction descriptions MRS on page 3-163 and MSR on page 3-164 for more
information about how to access the program status registers.
Application Program Status Register
The APSR contains the current state of the condition flags from previous instruction executions.
See the register summary in Table 2-2 on page 2-3 for its attributes. The bit assignments are:
Table 2-3 PSR register combinations
Register Type Combination
PSR
RW
a, b
a. The processor ignores writes to the IPSR
bits.
b. Reads of the EPSR bits return zero, and the
processor ignores writes to the these bits
APSR, EPSR, and IPSR
IEPSR RO EPSR and IPSR
IAPSR
RW
a
APSR and IPSR
EAPSR
RW
b
APSR and EPSR
Table 2-4 APSR bit assignments
Bits Name Function
[31] N Negative flag
[30] Z Zero flag
[29] C Carry or borrow flag
[28] V Overflow flag
[27] Q DSP overflow and saturation flag
[26:20] - Reserved
[19:16] GE[3:0] Greater than or Equal flags. See SEL on
page 3-70 for more information.
[15:0] - Reserved