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ARM Cortex-M4 - SSAT16 and USAT16

ARM Cortex-M4
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The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-97
ID121610 Non-Confidential
3.7.2 SSAT16 and USAT16
Signed Saturate and Unsigned Saturate to any bit position for two halfwords.
Syntax
op{cond} Rd, #n, Rm
where:
op
Is one of:
SSAT16
Saturates a signed halfword value to a signed range.
USAT16
Saturates a signed halfword value to an unsigned range.
cond
Is an optional condition code, see Conditional execution on page 3-18.
Rd
Specifies the destination register.
n
Specifies the bit position to saturate to:
n
ranges from 1 to 16 for
SSAT
.
n
ranges from 0 to 15 for
USAT
.
Rm
Specifies the register containing the value to saturate.
Operation
The
SSAT16
instruction:
1. Saturates two signed 16-bit halfword values of the register with the value to saturate from
selected by the bit position in n.
2. Writes the results as two signed 16-bit halfwords to the destination register.
The
USAT16
instruction:
1. Saturates two unsigned 16-bit halfword values of the register with the value to saturate
from selected by the bit position in n.
2. Writes the results as two unsigned halfwords in the destination register.
Restrictions
Do not use SP and do not use PC
.
Condition flags
These instructions do not affect the condition code flags.
If saturation occurs, these instructions set the Q flag to 1.
Examples
SSAT16 R7, #9, R2 ; Saturates the top and bottom highwords of R2
; as 9-bit values, writes to corresponding halfword
; of R7
USAT16NE R0, #13, R5 ; Conditionally saturates the top and bottom
; halfwords of R5 as 13-bit values, writes to
; corresponding halfword of R0.

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