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ARM Cortex-M4 - VMOV Scalar to ARM Core Register

ARM Cortex-M4
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The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-142
ID121610 Non-Confidential
3.11.15 VMOV Scalar to ARM Core register
Transfers one word of a doubleword floating-point register to an ARM core register.
Syntax
VMOV{cond} Rt, Dn[x]
where:
cond
Is an optional condition code, see Conditional execution on page 3-18.
Rt
Specifies the destination ARM core register.
Dn
Specifies the 64-bit doubleword register.
x
Specifies which half of the doubleword register to use:
•If x is 0, use lower half of doubleword register
•If x is 1, use upper half of doubleword register.
Operation
This instruction transfers:
one word from the upper or lower half of a doubleword floating-point register to an ARM
core register.
Restrictions
Rt cannot be PC or SP.
Condition flags
These instructions do not change the flags.

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