ARM Cortex-M4 - AND, ORR, EOR, BIC, and ORN

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-44
ID121610 Non-Confidential
3.5.2 AND, ORR, EOR, BIC, and ORN
Logical AND, OR, Exclusive OR, Bit Clear, and OR NOT.
Syntax
op{S}{cond} {Rd,} Rn, Operand2
where:
op Is one of:
AND logical AND.
ORR logical OR, or bit set.
EOR logical Exclusive OR.
BIC logical AND NOT, or bit clear.
ORN logical OR NOT.
S Is an optional suffix. If S is specified, the condition code flags are updated on the
result of the operation, see Conditional execution on page 3-18.
cond Is an optional condition code, see Conditional execution on page 3-18.
Rd Specifies the destination register.
Rn Specifies the register holding the first operand.
Operand2 Is a flexible second operand. See Flexible second operand on page 3-12 for
details of the options.
Operation
The
AND , EOR , and ORR instructions perform bitwise AND, Exclusive OR, and OR operations on
the values in
Rn and Operand2 .
The
BIC instruction performs an AND operation on the bits in Rn with the complements of the
corresponding bits in the value of
Operand2 .
The
ORN instruction performs an OR operation on the bits in Rn with the complements of the
corresponding bits in the value of
Operand2 .
Restrictions
Do not use SP and do not use PC.
Condition flags
If
S is specified, these instructions:
• update the N and Z flags according to the result
• can update the C flag during the calculation of
Operand2 , see Flexible second operand on
page 3-12
• do not affect the V flag.