The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-17
ID121610 Non-Confidential
3.3.5 Address alignment
An aligned access is an operation where a word-aligned address is used for a word, dual word,
or multiple word access, or where a halfword-aligned address is used for a halfword access. Byte
accesses are always aligned.
The Cortex-M4 processor supports unaligned access only for the following instructions:
•
LDR
,
LDRT
•
LDRH
,
LDRHT
•
LDRSH
,
LDRSHT
•
STR
,
STRT
•
STRH
,
STRHT
All other load and store instructions generate a UsageFault exception if they perform an
unaligned access, and therefore their accesses must be address aligned. For more information
about UsageFaults see Fault handling on page 2-29.
Unaligned accesses are usually slower than aligned accesses. In addition, some memory regions
might not support unaligned accesses. Therefore, ARM recommends that programmers ensure
that accesses are aligned. To trap accidental generation of unaligned accesses, use the
UNALIGN_TRP bit in the Configuration and Control Register, see Configuration and Control
Register on page 4-19.
3.3.6 PC-relative expressions
A PC-relative expression or label is a symbol that represents the address of an instruction or
literal data. It is represented in the instruction as the PC value plus or minus a numeric offset.
The assembler calculates the required offset from the label and the address of the current
instruction. If the offset is too big, the assembler produces an error.
• For
B
,
BL
,
CBNZ
, and
CBZ
instructions, the value of the PC is the address of the current
instruction plus 4 bytes.
• For all other instructions that use labels, the value of the PC is the address of the current
instruction plus 4 bytes, with bit[1] of the result cleared to 0 to make it word-aligned.
• Your assembler might permit other syntaxes for PC-relative expressions, such as a label
plus or minus a number, or an expression of the form
[PC, #number]
.
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