ARM Cortex-M4 - VCVT, VCVTR between Floating-Point and Integer

The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-131
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3.11.4 VCVT, VCVTR between floating-point and integer
Converts a value in a register from floating-point to a 32-bit integer.
Syntax
VCVT{R}{cond}.Tm.F32 Sd, Sm
VCVT{cond}.F32.Tm Sd, Sm
where:
R If R is specified, the operation uses the rounding mode specified by the FPSCR . If R
is omitted. the operation uses the
Round towards Zero rounding mode.
cond Is an optional condition code, see Conditional execution on page 3-18.
Tm Specifies the data type for the operand. It must be one of:
•
S32 signed 32-bit value.
•
U32 unsigned 32-bit value.
Sd, Sm Are the destination register and the operand register.
Operation
These instructions:
1. Either
• Converts a value in a register from floating-point value to a 32-bit integer.
• Converts from a 32-bit integer to floating-point value.
2. Places the result in a second register.
The floating-point to integer operation normally uses the
Round towards Zero rounding mode,
but can optionally use the rounding mode specified by the
FPSCR .
The integer to floating-point operation uses the rounding mode specified by the
FPSCR .
Restrictions
There are no restrictions.
Condition flags
These instructions do not change the flags.