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ARM Cortex-M4 - CMP and CMN; Compare and Compare Negative

ARM Cortex-M4
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The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-49
ID121610 Non-Confidential
3.5.5 CMP and CMN
Compare and Compare Negative.
Syntax
CMP{cond} Rn, Operand2
CMN{cond} Rn, Operand2
where:
cond
Is an optional condition code, see Conditional execution on page 3-18.
Rn
Specifies the register holding the first operand.
Operand2
Is a flexible second operand. See Flexible second operand on page 3-12 for
details of the options.
Operation
These instructions compare the value in a register with
Operand2
. They update the condition
flags on the result, but do not write the result to a register.
The
CMP
instruction subtracts the value of
Operand2
from the value in
Rn
. This is the same as a
SUBS
instruction, except that the result is discarded.
The
CMN
instruction adds the value of
Operand2
to the value in
Rn
. This is the same as an
ADDS
instruction, except that the result is discarded.
Restrictions
In these instructions:
do not use PC
Operand2
must not be SP.
Condition flags
These instructions update the N, Z, C and V flags according to the result.
Examples
CMP R2, R9
CMN R0, #6400
CMPGT SP, R7, LSL #2

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