EasyManua.ls Logo

ARM Cortex-M4 - Msr

ARM Cortex-M4
276 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
The Cortex-M4 Instruction Set
ARM DUI 0553A Copyright © 2010 ARM. All rights reserved. 3-164
ID121610 Non-Confidential
3.12.7 MSR
Move the contents of a general-purpose register into the specified special register.
Syntax
MSR{cond} spec_reg, Rn
where:
cond
Is an optional condition code, see Conditional execution on page 3-18.
Rn
Specifies the source register.
spec_reg
Can be any of:
APSR_nzcvq
,
APSR_g
,
APSR_nzcvqg
,
MSP
,
PSP
,
PRIMASK
,
BASEPRI
,
BASEPRI_MAX
,
FAULTMASK
, or
CONTROL
.
Note
You can use
APSR
to refer to
APSR_nzcvq
.
Operation
The register access operation in
MSR
depends on the privilege level. Unprivileged software can
only access the
APSR
, see Table 2-4 on page 2-5. Privileged software can access all special
registers.
In unprivileged software writes to unallocated or execution state bits in the
PSR
are ignored.
Note
When you write to
BASEPRI_MAX
, the instruction writes to
BASEPRI
only if either:
Rn
is non-zero and the current
BASEPRI
value is 0
Rn
is non-zero and less than the current
BASEPRI
value.
See MRS on page 3-163.
Restrictions
Rn
must not be SP and must not be PC.
Condition flags
This instruction updates the flags explicitly based on the value in Rn.
Examples
MSR CONTROL, R1 ; Read R1 value and write it to the CONTROL register

Table of Contents

Related product manuals